• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The UC1825A PWM controller is an improved version of the standard UC1825 family. Performance enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is 12 MHz, while input offset voltage is 2 mV. Current limit threshold is assured to a tolerance of 5%. Oscillator discharge current is specified at 10 mA for accurate dead time control. Frequency accuracy is improved to 6%. Startup supply current, typically 100 µA, is ideal for off-line applications. The output drivers are redesigned to actively sink current during UVLO at no expense to the startup current specification. In addition each output is capable of 2-A peak currents during transitions.

Functional improvements have also been implemented in this family.

特性

• QML-V Qualified, SMD 5962-87681
• Rad-Tolerant: 30 kRad (Si) TID⁽¹⁾
• Compatible With Voltage-Mode or Current-Mode Control Methods
• Practical Operation at Switching Frequencies to 1 MHz
• 50-ns Propagation Delay to Output
• High-Current Dual Totem Pole Outputs
  (2-A Peak)
• Trimmed Oscillator Discharge Current
• Low 100-µA Startup Current
• Pulse-by-Pulse Current Limiting Comparator
• Latched Overcurrent Comparator With Full Cycle Restart