• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TSB12LV01B is an IEEE 1394-1995 standard (from now on referred to only as 1394) high-speed serial-bus link-layer controller that allows for easy integration into an I/O subsystem. The TSB12LV01B provides a high-performance IEEE 1394-1995 interface with the capability of transferring data between the 32-bit host bus, the 1394 PHY-link interface, and external devices connected to the local bus interface. The 1394 PHY-link interface provides the connection to the 1394 physical (PHY) layer device and is supported by the link-layer controller (LLC). The LLC provides the control for transmitting and receiving 1394 packet data between the FIFO and PHY-link interface at rates of 100 Mbits/s, 200 Mbits/s, and 400 Mbits/s.

特性

• Link Core
  • Supports Provision of IEEE 1394-1995 (1394) Standard for High-Performance Serial Bus
  • Transmits and Receives Correctly Formatted 1394 Packets
  • Supports Asynchronous and Isochronous Data Transfers
  • Performs Function of 1394 Cycle Master
  • Generates and Checks 32-Bit CRC
  • Detects Lost Cycle-Start Messages
  • Contains Asynchronous, Isochronous, and General-Receive FIFOs Totaling 2K Bytes
• Physical-Link Interface
  • Compatible With Texas Instruments Physical Layer Devices (PHYs)
  • Supports Transfer Speeds of 100, 200, and 400 Mbits/s
  • Timing Compliant with IEEE 1394a–2000
• Host Bus Interface
  • Provides Chip Control With Directly Addressable Registers
  • Is Interrupt Driven to Minimize Host Polling
  • Has a Generic 32-Bit Host Bus Interface
• General
  • Operates From a 3.3-V Power Supply While Maintaining 5-V Tolerant Inputs
  • Manufactured With Low-Power CMOS Technology
  • 100-Pin PZT Package for 0°C to 70°C and –40°C to 85°C (I Temperature) Operation