• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TPS744xx low-dropout (LDO) linear regulators provide an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process.

器件用途

• FPGA Applications
• DSP Core and I/O Voltages
• Post-Regulation Applications
• Applications with Special Start-Up Time or Sequencing Requirements
• Hot-Swap and Inrush Controls

特性

• Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
• 1% Accuracy Over Line, Load, and Temperature
• Supports Input Voltages as Low as 0.9V with External Bias Supply
• Adjustable Output (0.8V to 3.6V)
• Fixed Output (0.9V to 3.6V)
• Ultra-Low Dropout: 115mV at 3.0A (typ)
• Stable with Any or No Output Capacitor
• Excellent Transient Response
• Available in 5mm × 5mm × 1mm QFN and DDPAK-7 Packages
• Open-Drain Power-Good (QFN only)
• Active High Enable