• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TPS51100 is a 3-A sink/source tracking termination regulator. It is specifically designed for low-cost/low-external component count systems, where space is a premium.

The TPS51100 maintains fast transient response only requiring 20-µF (2 × 10µF) of ceramic output capacitance. The TPS51100 supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. In addition, the TPS51100 includes integrated sleep-state controls placing VTT in High-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S5 (suspend to disk). The TPS51100 is available in the thermally efficient 10-pin MSOP PowerPAD™ and is specified from –40°C to 85°C.

特性

• Input Voltage Range: 4.75 V to 5.25 V
• VLDOIN Voltage Range: 1.2 V to 3.6 V
• 3-A Sink/Source Termination Regulator Includes Droop Compensation
• Requires Only 20-µF Ceramic Output Capacitance
• Supports High-Z in S3 and Soft-Off in S5
• 1.2-V Input (VLDOIN) Helps Reduce Total Power Dissipation
• Integrated Divider Tracks ½VDDQSNS for VTT and VTTREF
• Remote Sensing (VTTSNS)
• ± 20-mV Accuracy for VTT and VTTREF
• 10-mA Buffered Reference (VTTREF)
• Built-In Soft-Start, UVLO and OCL
• Thermal Shutdown
• Supports JEDEC Specifications
• APPLICATIONS
  • DDR, DDR2 Memory Termination
  • SSTL-2, SSTL-18 and HSTL Termination