说明
The TMS320UC5409 fixed-point, digital signal processor (DSP) (hereafter referred to as the 'UC5409 unless otherwise specified) is ideal for low-power, high-performance applications. This processor offers very low power consumption and the flexibility to support various system voltage configurations. The wide range of I/O voltage enables it to operate with a single 1.8-V power supply or with dual power supplies for mixed voltage systems. This feature eliminates the need for external level-shifting and reduces power consumption in emerging sub-3V systems.
The TMS320UC5409 fixed-point, digital signal processor (DSP) (hereafter referred to as the 'UC5409 unless otherwise specified) is based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses.
特性
- Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus
- 40-Bit Arithmetic Logic Unit (ALU), Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators
- 17-× 17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation
- Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator
- Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle
- Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
- Data Bus With a Bus-Holder Feature
- Extended Addressing Mode for 8M × 16-Bit Maximum Addressable External Program Space
- 16K x 16-Bit On-Chip ROM
- 32K x 16-Bit Dual-Access On-Chip RAM
- Single-Instruction-Repeat and Block-Repeat Operations for Program Code
- Block-Memory-Move Instructions for Better Program and Data Management
- Instructions With a 32-Bit Long Word Operand
- Instructions With Two- or Three-Operand Reads
- Arithmetic Instructions With Parallel Store and Parallel Load
- Conditional Store Instructions
- Fast Return From Interrupt
- On-Chip Peripherals
- Software-Programmable Wait-State Generator and Programmable Bank Switching
- On-Chip Phase-Locked Loop (PLL) Clock Generator With Internal Oscillator or External Clock Source
View All Features in Datasheet
