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产品名称：TMS320DM648-800
产品封装：529FCBGA
产品品牌：Texas Instruments
PDF文档：下载
库 存：查看
电 话：0755-83035811
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产品介绍
说明
The TMS320C64x+™ DSPs (including the TMS320DM647, TMS320DM648 devices) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM647, DM648 devices are based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.
Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.
特性
- Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
- High-Performance Digital Media Processor
- 720-MHz, 800-MHz, 900-MHz C64x+™ Clock Rates
- 1.39 ns (-720), 1.25 ns (-800), 1.11 ns (-900), 0.91 ns (-1100) Instruction Cycle Time
- 5760, 6400, 7200, 8800 MIPS
- Eight 32-Bit C64x+ Instructions/Cycle
- Fully Software-Compatible With C64x/Debug
- Commercial Temperature Ranges (-720, -900, and -1100 only)
- Extended Temperature Ranges (-800 only)
- Industrial Temperature Ranges (-720, and -900 only)
- VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
- Eight Highly Independent Functional Units With VelociTI.2 Extensions:
- Six ALUs (32-/40-Bit), Each Supports Single 32-bit, Dual 16-bit, or Quad 8-bit Arithmetic per Clock Cycle
- Two Multipliers Support Four 16 x 16-bit Multiplies (32-bit Results) per Clock Cycle or Eight 8 x 8-bit Multiplies (16-Bit Results) per Clock Cycle
- Load-Store Architecture With Non-Aligned Support
- 64 32-bit General-Purpose Registers
- Instruction Packing Reduces Code Size
- All Instructions Conditional
- Additional C64x+™ Enhancements
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