• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TMS320C64x™ DSPs (including the TMS320C6413, TMS320C6410 devices) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320C6413 and TMS320C6410 (C6413 and C6410) devices are based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™) developed by Texas Instruments (TI)™ The high-performance, lower-cost C6413/C6410 DSPs enable customers to reduce system costs for telecom, medical, industrial, office, and photo lab equipment. The C64x™ is a code-compatible member of the C6000™ DSP platform.

With performance of up to 4000 million instructions per second (MIPS) at a clock rate of 500 MHz, the C6413 device offers cost-effective solutions to high-performance DSP programming challenges.

特性

• High-Performance Fixed-Point Digital Signal Processor (TMS320C6413/C6410)
  • TMS320C6413
    • 2-ns Instruction Cycle Time
    • 500-MHz Clock Rate
    • 4000 MIPS
  • TMS320C6410
    • 2.5-ns Instruction Cycle Time
    • 400-MHz Clock Rate
    • 3200 MIPS
  • Eight 32-Bit Instructions/Cycle
  • Fully Software-Compatible With C64x™
  • Extended Temperature Devices Available
• VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core
  • Eight Highly Independent Functional Units With VelociTI.2™ Extensions:
    • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
    • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle
  • Load-Store Architecture With Non-Aligned Support
  • 64 32-Bit General-Purpose Registers
  • Instruction Packing Reduces Code Size
  • All Instructions Conditional