• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TMS320C6202 and TMS320C6202B devices are part of the TMS320C62x™ fixed-point DSP generation in the TMS320C6000™ DSP platform. The C62x™ DSP devices are based on the high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

The TMS320C62x™ DSP offers cost-effective solutions to high-performance DSP-programming challenges. The TMS320C6202/02B has a performance capability of up to 2400 million instructions per second (MIPS) at 300 MHz. The C6202/02B DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors.

特性

• High-Performance Fixed-Point Digital Signal Processors (DSPs) – TMS320C62x™
  • 5-, 4-, 3.33-ns Instruction Cycle Time
  • 200-, 250-, 300-MHz Clock Rate
  • Eight 32-Bit Instructions/Cycle
  • 1600, 2000, 2400 MIPS
• C6202 and C6203B GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package
• C6202B and C6203B GNZ and GNY Packages are Pin-Compatible
• VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) C62x™ DSP Core
  • Eight Highly Independent Functional Units:
    • Six ALUs (32-/40-Bit)
    • Two 16-Bit Multipliers (32-Bit Result)
  • Load-Store Architecture With 32 32-Bit General-Purpose Registers
  • Instruction Packing Reduces Code Size
  • All Instructions Conditional
• Instruction Set Features
  • Byte-Addressable (8-, 16-, 32-Bit Data)
  • 8-Bit Overflow Protection
  • Saturation
  • Bit-Field Extract, Set, Clear
  • Bit-Counting