• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TL16PC564B/BLV is designed to provide all the functions necessary for a Personal Computer Memory Card International Association (PCMCIA) universal asynchronous receiver transmitter (UART) subsystem interface. This interface provides a serial-to-parallel conversion for data to and from a modem coder-decoder/digital signal processor (CODEC/DSP) function to a PCMCIA parallel data-port format. A computer central processing unit (CPU), through a PCMCIA host controller, can read the status of the asynchronous communications element (ACE) interface at any point in the operation. Reported status information includes the type of transfer operation in process, the status of the operation, and any error conditions encountered.

特性

• Integrated Asynchronous Communications Element (ACE) Compatible With PCMCIA PC Card Standard Release 2.01
• Consists of a Single TL16C550 ACE Plus PCMCIA Interface Logic
• Provides Common I-Bus/Z-Bus Microcontroller Inputs for Most Intel™ and Zilog™ Subsystems
• Fully Programmable 256-Byte Card Information Structure (CIS) and 8-Byte Card Configuration Register (CCR)
• Adds or Deletes Standard Asynchronous Communication Bits (Start, Stop and Parity) to or From Serial Data Stream
• Independently Controlled Transmit, Receive, Line Status, and Data Set Interrupts
• Subsystem Selectable Serial-Bypass Mode Provides Subsystem With Direct Parallel Access to the FIFOs
• Fully Programmable Serial-Interface Characteristics:
  • 5-, 6-, 7-, or 8-Bit Characters
  • Even-, Odd-, or No-Parity Bit Generation and Detection
  • 1-, 1 1/2-, or 2-Stop Bit Generation
  • Baud-Rate Generation
• Fully Prioritized Interrupt System Controls
• Modem Control Functions
• Provides TL16C450 Mode at Reset Plus Selectable Normal TL16C550 Operation or Extended 64-Byte FIFO Mode
• Selectable Auto-RTS\ Mode Deactivates RTS\ at 14 Bytes in 550 Mode and at 56 Bytes in Extended 550 Mode
• Selectable Auto-CTS\ Mode Deactivates Serial Transfers When CTS\ is Inactive
• Available in 100 Pin Thin Quad Flatpack (PZ) Package or 100-Ball (GGM) MicroStar BGA™ Package

Intel is a registered trademark of Intel System, Inc. Zilog is a registered trademark of Zilog Incorporated MicroStar BGA is a trademark of Texas Instruments Incorporated.