• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The Texas Instruments TFP403 is a PanelBus_™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP403 finds applications in any design requiring high-speed digital interface.

The TFP403 supports display resolutions up to UXGA in 24-bit true color pixel format. The TFP403 offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPAD advanced packaging technology results in best of class power dissipation, footprint, and ultralow ground inductance.

The TFP403 combines PanelBus™ circuit innovation with TIs advanced 0.

特性

• Supports UXGA Resolution (Output Pixel Rates up to 165 MHz)
• Digital Visual Interface (DVI 1.0) Specification Compliant¹
• Pin-for-Pin Compatible With TFP501 for Simple Upgrade Path to HDCP²
• True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels per Clock
• Laser Trimmed (50 ) Input Stage for Optimum Fixed Impedance Matching
• Skew Tolerant up to One Pixel Clock Cycle (High Clock and Data Jitter Tolerance)
• 4x Over-Sampling for Reduced Bit-Error Rates and Better Performance Over Longer Cables
• Reduced Power Consumption—1.8-V Core Operation With 3.3 V I/Os and Supplies³
• Reduced Ground Bounce Using Time Staggered Pixel Outputs
• Lowest Noise and Best Power Dissipation Using PowerPAD™ Packaging
• Advanced Technology Using TI 0.18-um EPIC-5™ CMOS Process
• Supports Hot Plug Detection

NOTE: Designing with this device may require extensive support. Before incorporating this device into a design, customers should contact TI or an Authorized TI Distributor.

^1. The Digital Visual Interface Specification (DVI) is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TFP403 is compliant with the DVI Specification Rev. 1.0.

^2. High-bandwidth digital content protection (HDCP) is the system used for protecting DVI outputs from being copied. The TFP501 is TI’s DVI receiver with HDCP functionality.

^3. The TFP403 has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.

PanelBus, PowerPAD, and EPIC-5 are trademarks of Texas Instruments.