STM8AF6268
Features
■ Core
– Max fCPU: 16 MHz
– Advanced STM8A core with Harvard
architecture and 3-stage pipeline
– Average 1.6 cycles/instruction resulting in
10 MIPS at 16 MHz fCPU for industry
standard benchmark
■ Memories
– Flash Program memory: 16 to 32 Kbytes
Flash; data retention 20 years at 55 °C
after 1 kcycle
– Data memory: 0.5 to 1 Kbyte true data
EEPROM; endurance 300 kcycles
– RAM: 1 to 2 Kbytes
■ Clock management
– Low-power crystal resonator oscillator with
external clock input
– Internal, user-trimmable 16 MHz RC and
low-power 128 kHz RC oscillators
– Clock security system with clock monitor
■ Reset and supply management
– Wait/auto-wakeup/Halt low-power modes
with user definable clock gating
– Low consumption power-on and powerdown
reset
■ Interrupt management
– Nested interrupt controller with 32 vectors
– Up to 34 external interrupts on 5 vectors
■ Timers
– Up to 2 general purpose 16-bit PWM timers
with up to 3 CAPCOM channels each (IC,
OC or PWM)
– Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, deadtime
insertion and flexible synchronization
– 8-bit AR basic timer with 8-bit prescaler
– Auto-wakeup timer
