ST10F273M
Features
■ High performance 16-bit CPU with DSP
functions
– 50ns instruction cycle time at 40 MHz max
CPU clock
– Multiply/accumulate unit (MAC) 16 x 16-bit
multiplication, 40-bit accumulator
– Enhanced boolean bit manipulations
– Single-cycle context switching support
■ Memory organization
– 512 Kbyte on-chip Flash memory single
voltage with erase/program controller (full
performance, 32-bit fetch)
– 100 K erasing/programming cycles
– Up to 16 Mbyte linear address space for
code and data (5 Mbytes with CAN or I2C)
– 2 Kbyte on-chip internal RAM (IRAM)
– 34 Kbyte on-chip extension RAM (XRAM)
– Programmable external bus configuration
and characteristics for different address
ranges
– 5 programmable chip-select signals
– Hold-acknowledge bus arbitration support
■ Interrupt
– 8-channel peripheral event controller for
single cycle interrupt driven data transfer
– 16-priority-level interrupt system with 56
sources, sampling rate down to 25ns
■ Timers
– 2 multifunctional general purpose timer
units with 5 timers
■ Two 16-channel capture / compare units
■ 4-channel PWM unit + 4-channel XPWM
