SPC560C50L3
Features
■ High-performance 64 MHz e200z0h CPU
– 32-bit Power Architecture® technology
– Up to 60 DMIPs operation
– Variable length encoding (VLE)
■ Memory
– Up to 512 Kbytes Code Flash, with ECC
– 64 Kbytes Data Flash, with ECC
– Up to 48 Kbytes SRAM, with ECC
– 8-entry memory protection unit (MPU)
■ Interrupts
– 16 priority levels
– Non-maskable interrupt (NMI)
– Up to 34 ext. int. including 18 wakeup lines
■ GPIO: LQFP64/45, LQFP100/75,
LQFP144/123
■ Timer units
– 6-channel 32-bit periodic interrupt timers
– 4-channel 32-bit system timer module
– System watchdog timer
– Real-time clock timer
■ 16-bit counter time-triggered I/Os
– Up to 56 channels with PWM/MC/IC/OC
– ADC diagnostic via CTU
■ Communications interface
– Up to 6 FlexCAN interfaces (2.0B active)
with 64-message objects each
– Up to 4 LINFlex/UART
– 3 DSPI / I2C
