• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN75LVDS83 FlatLink transmitter contains four 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differential-signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82. The SN75LVDS83 can also be used in 21-bit links with the SN75LVDS86 receiver.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected by way of the clock select (CLKSEL) terminal.

特性

• 4:28 Data Channel Compression at up to 238 MBytes/s Throughput
• Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
• 28 Data Channels and Clock-In Low-Voltage TTL
• 4 Data Channels and Clock-Out Low-Voltage Differential
• Operates From a Single 3.3-V Supply With 250 mW (Typ)
• ESD Protection Exceeds 6 kV
• 5-V Tolerant Data Inputs
• Selectable Rising or Falling Edge-Triggered Inputs
• Packaged in Thin Shrink Small-Outline Package With 20-Mil Terminal Pitch
• Consumes Less Than 1 mW When Disabled
• Wide Phase-Lock Input Frequency Range . . . 31 MHz to 68 MHz
• No External Components Required for PLL
• Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
• Improved Replacement for the DS90C581

FlatLink is a registered trademark of Texas Instruments.