• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN75LVDS82 FlatLink™ receiver contains four serial-in, 7-bit parallel-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, over five balanced-pair conductors, and expansion to 28 bits of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate. The SN75LVDS82 can also be used with the SN75LVDS84 or SN75LVDS85 for 21-bit transfers.

When receiving, the high-speed LVDS data is received and loaded into registers at the rate of seven times (7×) the LVDS input clock (CLKIN).

特性

• 4:28 Data Channel Expansion at up to 238 Mbytes/s Throughput
• Suited for SVGA, XGA, or SXGA Display
  Data Transmission From Controller to
  Display With Very Low EMI
• Four Data Channels and Clock Low-Voltage
  Differential Channels In and 28 Data and
  Clock Low-Voltage TTL Channels Out
• Operates From a Single 3.3-V Supply With
  250 mW (Typ)
• 5-V Tolerant SHTDN Input
• Falling Clock-Edge-Triggered Outputs
• Packaged in Thin Shrink Small-Outline
  Package (TSSOP) With 20-Mil Terminal Pitch
• Consumes Less Than 1 mW When Disabled
• Wide Phase-Lock Input Frequency
  Range . . . 31 MHz to 68 MHz
• No External Components Required for PLL
• Inputs Meet or Exceed the Requirements of
  ANSI EIA/TIA-644 Standard
• Improved Replacement for the National™ DS90C582

FlatLink is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners