• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN74LVTH32244 is a 32-bit buffer and line driver designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. The device provides true outputs and has symmetrical active-low output-enable (OE)\ inputs. It is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

When V_CC is between 0 and 1.5-V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5-V, OE\ shall be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

特性

• Controlled Baseline
  - One Assembly/Test Site, One Fabrication Site
• Enhanced Diminishing Manufacturing Sources (DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree†
• Member of the Texas Instruments Widebus+™ Family
• State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
• Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
• I_off and Power-Up 3-State Support Hot Insertion
• Supports Unregulated Battery Operation Down To 2.7 V
• Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  - 2000-V Human-Body Model (A114-A)
  - 200-V Machine Model (A115-A)
  - 1000-V Charged-Device Model (C101)

Widebus+ is a trademark of Texas Instruments.