• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The ’LV594A devices are 8-bit shift registers designed for 2-V to 5.5-V V_CC operation.

These devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (RCLK, SRCLK) and direct overriding clear (RCLR\, SRCLR\) inputs are provided on the shift and storage registers. A serial output (Q_H') is provided for cascading purposes.

The shift-register (SRCLK) and storage-register (RCLK) clocks are positive-edge triggered. If the clocks are tied together, the shift register always is one clock pulse ahead of the storage register.

特性

• 2-V to 5.5-V V_CC Operation
• Max t_pd of 6.5 ns at 5 V
• Typical V_OLP (Output Ground Bounce)
     <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
     >2.3 V at V_CC = 3.3 V, T_A = 25°C
• Supports Mixed-Mode Voltage Operation on All Ports
• 8-Bit Serial-In, Parallel-Out Shift Registers With Storage
• Independent Direct Overriding Clears on Shift and Storage Registers
• Independent Clocks for Shift and Storage Registers
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)