• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The ’HC594 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (RCLR\, SRCLR\) inputs are provided on both the shift and storage registers. A serial (Q_H’) output is provided for cascading purposes.

Both the shift register (SRCLK) and storage register (RCLK) clocks are positive edge triggered. If both clocks are connected together, the shift register always is one count pulse ahead of the storage register.

The parallel (Q_A–Q_H) outputs have high-current capability. Q_H’ is a standard output.

特性

• Wide Operating Voltage Range of 2 V to 6 V
• High-Current Outputs Can Drive Up To 15 LSTTL Loads
• Low Power Consumption, 80-µA Max I_CC
• Typical t_pd = 15 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 µA Max
• 8-Bit Serial-In, Parallel-Out Shift Registers With Storage
• Independent Direct Overriding Clears on Shift and Storage Registers
• Independent Clocks for Both Shift and Storage Registers