• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN74GTLP1394 is a high-drive, 2-bit, 3-wire bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translation. It allows for transparent and inverted transparent modes of data transfer with separate LVTTL input and LVTTL output pins, which provides a feedback path for control and diagnostics monitoring. The device provides a high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels, and is especially designed to work with the Texas Instruments 1394 backplane physical-layer controllers. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC™ circuitry, and TI-OPC™ circuitry.

特性

• TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes
• OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference
• Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels
• Split LVTTL Port Provides a Feedback Path for Control and Diagnostics Monitoring
• LVTTL Interfaces Are 5-V Tolerant
• High-Drive GTLP Outputs (100 mA)
• LVTTL Outputs (–24 mA/24 mA)
• Variable Edge-Rate Control (ERC\) Input Selects GTLP Rise and Fall Times for Optimal Data-Transfer Rate and Signal Integrity in Distributed Loads
• I_off, Power-Up 3-State, and BIAS V_CC Support Live Insertion
• Polarity Control Selects True or Complementary Outputs
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

OEC, TI, and TI-OPC are trademarks of Texas Instruments