SN74CB3Q3384A

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首页 >> 产品展示 >> 集成电路 >> 逻辑电路 >> 标准逻辑 >> SN74CB3Q3384A

产品名称：SN74CB3Q3384A

产品封装：SSOP/QSOP24 TVSOP24 TSSOP24

产品品牌：Texas Instruments

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产品介绍

SN74CB3Q3384A

说明

The SN74CB3Q3384A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (r_on). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3384A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3384A is organized as two 5-bit bus switches with separate output-enable (1OE\, 2OE\) inputs.

特性

High-Bandwidth Data Path (Up To 500 MHz)
5-V Tolerant I/Os with Device Powered-Up or Powered-Down
Low and Flat ON-State Resistance (r_on) Characteristics Over Operating Range (r_on = 3 Typical)
Rail-to-Rail Switching on Data I/O Ports
- 0- to 5-V Switching With 3.3-V V_CC
- 0- to 3.3-V Switching With 2.5-V V_CC
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 4 pF Typical)
Fast Switching Frequency (f_OE\ = 20 MHz Max)
Data and Control Inputs Provide Undershoot Clamp Diodes
Low Power Consumption (I_CC = 1 mA Typical)
V_CC Operating Range From 2.3 V to 3.6 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating