SN74BCT25642
说明
This 25-
octal bus transceiver is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction-control (DIR) input. The output-enable (
) input can be used to disable the device so the buses are effectively isolated.
The SN74BCT25642 is capable of sinking 188-mA IOL (A port), which facilitates switching 25-
transmission lines on the incident wave. It is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented transceivers. The distributed VCC and GND pins minimize the noise generated by the simultaneous switching of the outputs.
特性
- State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
- ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Designed to Facilitate Incident-Wave Switching for Line Impedances of 25-
or Greater
- Distributed VCC and GND Pins Minimize Noise Generated by the Simultaneous Switching of Outputs
- The A Port Features Open-Collector Outputs That Provide 188-mA IOL to Allow for Heavy DC Loading on Open-Collector Outputs
- Eliminates Need for 3-State Overlap Protection on A Ports
- Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT)