品牌索引 产品分类 > 小信号开关二极管> 瞬态电压抑制器TVS/ESD> 双极管二极管> 调谐二极管> 齐纳(稳压)二极管> 小信号肖特基二极管> 频带转换二极管> 中/高功率管> 射频PIN二极管> Sinterglass二极管> 整流器 > N沟道(N-Channel)> P沟道(P-Channel)> 双N沟道(Dual N-Channel)> 双P沟道(Dual P-Channel)> 双N和P沟道(Dual N and P-Channel)
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产品介绍
说明
This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. 特性
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. |