• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

These 18-bit bus-interface flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The ’ABT162823A devices can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CLKEN)\ input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, thus latching the outputs. Taking the clear (CLR)\ input low causes the Q outputs to go low independently of the clock.

A buffered output-enable (OE)\ input places the nine outputs in either a normal logic state (high or low level) or a high-impedance state.

特性

• Members of the Texas Instruments Widebus™ Family
• Output Ports Have Equivalent 25- Series Resistors So No External Resistors Are Required
• Typical V_OLP (Output Ground Bounce) <1 V at V_CC = 5 V, T_A = 25°C
• High-Impedance State During Power Up and Power Down
• I_off and Power-Up 3-State Support Hot Insertion
• Distributed V_CC and GND Pins Minimize High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB Layout

Widebus is a trademark of Texas Instruments.