• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 50-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100-Ω characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables.

特性

• Qualified for Automotive Applications
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
• Signaling Rates up to 400 Mbps
• Bus-Terminal ESD Exceeds 12 kV
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 100-Ω Load
• Propagation Delay Times
  • Driver: 1.7 ns Typ
  • Receiver: 3.7 ns Typ
• Power Dissipation at 200 MHz
  • Driver: 25 mW Typical
  • Receiver: 60 mW Typical
• LVTTL Input Levels Are 5-V Tolerant
• Receiver Maintains High Input Impedance With V_CC < 1.5 V
• Receiver Has Open-Circuit Fail Safe