• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN65LVDS049 is a dual flow-through differential line driver-receiver pair that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644-A standard compliant electrical interface provides a minimum differential output voltage magnitude of 250 mV into a 100- load and receipt of signals with up to 1 V of ground potential difference between a transmitter and receiver. The LVDS receivers have internal failsafe biasing that places the outputs into a known high state for unconnected differential inputs.

The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100- characteristic impedance.

特性

• DS90LV049 Compatible
• Up to 400 Mbps Signaling Rates
• Flow-Through Pin-out
• 50 ps Driver Channel-to-Channel Skew (Typ)
• 50 ps Receiver Channel-to-Channel Skew (Typ)
• 3.3-V Power Supply
• High-Impedance Disable for all Outputs
• Internal Failsafe Biasing of Receiver Inputs
• 1.4 ns Driver Propagation Delay (Typ)
• 1.9 ns Receiver Propagation Delay (Typ)
• High Impedance Bus Pins on Power Down
• ANSI TIA/EIA-644-A Compliant
• Receiver Input and Driver Output ESD Exceeds 10 kV
• 16-pin TSSOP Package
• APPLICATIONS
  • Full-duplex LVDS Communications of Clock and Data
  • Printers