• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN65LVDM31 incorporates four differential line drivers that implement the electrical characteristics of low-voltage differential signaling. This product offers a low-power alternative to 5-V PECL drivers with similar signal levels. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 540 mV into a 100- load when enabled by either an active-low or active-high enable input.

The intended application of this device and signaling technique is for both point-to-point and multiplexed baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

特性

• Designed for Signaling Rates Up to 150 Mbps
• Low-Voltage Differential Signaling With Typical Output Voltage of 700 mV and a 100- Load
• Propagation Delay Time of 2.3 ns, Typical
• Single 3.3-V Supply Operation
• One Driver's Power Dissipation at 75 MHz, 50 mW, Typical
• High-Impedance Outputs When Disabled or With V_CC < 1.5 V
• Bus-Pin ESD Protection Exceeds 12 kV
• Low-Voltage CMOS (LVCMOS) Logic Input Levels Are 5-V Tolerant

The signaling rate is the number of voltage transitions that can be made per second.