• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50- load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less than 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of this device and signaling technique is for half-duplex or multiplex baseband data transmission over controlled impedance media of approximately 100- characteristic impedance.

特性

• Low-Voltage Differential Driver and Receiver for Half-Duplex Operation
• Designed for Signaling Rates of 400 Mbit/s
• ESD Protection Exceeds 15 kV on Bus Pins
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 50- Load
• Valid Output With as Little as 50 mV Input Voltage Difference
• Propagation Delay Times
  • Driver: 1.7 ns Typ
  • Receiver: 3.7 ns Typ
• Power Dissipation at 200 MHz
  • Driver: 50 mW Typical
  • Receiver: 60 mW Typical
• LVTTL Levels Are 5-V Tolerant
• Bus Pins Are High Impedance When Disabled or With V_CC Less Than 1.5 V
• Open-Circuit Fail-Safe Receiver
• Surface-Mount Packaging
  • D Package (SOIC)
  • DGK Package (MSOP)

PowerPAD is a trademark of Texas Instruments.