• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN65LVDM1676 and SN65LVDM1677 (integrated termination) are sixteen differential line transmitters or receivers (tranceivers) that use low-voltage differential signaling (LVDS) to achieve signaling rates up to 200 Mbps per transceiver configured as a receiver and up to 650 Mbps per transceiver configured as a transmitter. These products are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers are doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50- load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of 100 mV with up to 1 V of ground potential difference between a transmitter and receiver.

特性

• Sixteen Low-Voltage Differential Transceivers. Designed for Signaling Rates up to 200 Mbps per Receiver or 650 Mbps per Transmitter.
• Simplex (Point-to-Point) or Half-Duplex (Multipoint) Interface
• Typical Differential Output Voltage of 340 mV Into a 50- Line Termination on 'LVDM1677 Product
• Propagation Delay Time:
  • Driver: 2.5 ns Typ
  • Receiver: 3 ns Typ
• Driver is High Impedance When Disabled or With V_CC < 1.5 V for Power Up/Down Glitch-Free Performance and Hot-Plugging Events
• Bus-Terminal ESD Protection Exceeds 12 kV
• Low-Voltage TTL (LVTTL) Logic Input Levels Are 5-V Tolerant
• Packaged in Thin Shrink Small-Outline Package With 20 mil Terminal Pitch