• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

This high-speed translator/repeater is designed for signaling rates up to 1.5 Gbps to support various high-speed network routing applications. The driver output is compatible with current-mode logic (CML) levels, and directly drives 50- loads connected to 1.8-V, 2.5-V, or 3.3-V nominal supplies. The capability for direct connection to the loads may eliminate the need for coupling capacitors. The receiver input is compatible with LVDS (TIA/EIA–644), LVPECL, and CML signaling levels. The receiver tolerates a wide common-mode voltage range, and may also be directly coupled to the signal source. The internal data path from input to output is fully differential for low noise generation and low pulse-width distortion.

特性

• Provides Level Translation From LVDS or LVPECL to CML, Repeating From CML to CML
• Signaling Rates¹ up to 1.5 Gbps
• CML Compatible Output Directly Drives Devices With 3.3-V, 2.5-V, or 1.8-V Supplies
• Total Jitter < 70 ps
• Low 100 ps (Max) Part-To-Part Skew
• Wide Common-Mode Receiver Capability Allows Direct Coupling of Input Signals
• 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
• Propagation Delay Times, 800 ps Maximum
• 3.3-V Supply Operation
• Available in SOIC and MSOP Packages
• APPLICATIONS
  • Level Translation
  • 622-MHz Central Office Clock Distribution
  • High-Speed Network Routing
  • Wireless Basestations
  • Low Jitter Clock Repeater

¹ The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).