• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The SN64BCT25244 is a 25- octal buffer and line driver designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented transceivers.

When the output-enable (1 and 2) inputs are low, the device transmits data from the A inputs to the Y outputs. When 1 and 2 are high, the outputs are in the high-impedance state.

This buffer/driver is capable of sinking 188-mA I_OL, which facilitates switching 25- transmission lines on the incident wave. The distributed V_CC and GND pins minimize switching noise for more reliable system operation.

The outputs are in a high-impedance state during power up and power down while the supply voltage value is less than approximately 3 V.

特性

• State-of-the-Art BiCMOS Design Significantly Reduces I_CCZ
• High-Impedance State During Power Up and Power Down
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Designed to Facilitate Incident-Wave Switching for Line Impedances of 25 or Greater
• Distributed V_CC and GND Pins Minimize Noise Generated by the Simultaneous Switching of Outputs
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT)