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首 页 > 新闻动态 > 公司新闻 > 供应 TI DIR1703 音频接口接收器 供应 TI DIR1703 音频接口接收器
FEATURES
•
One-Chip Digital Audio Interface Receiver
(DIR) Including Low-Jitter Clock-Recovery
System
Compliant With Digital Audio Interface
Standards: IEC60958 (former IEC958), JEITA
CPR-1205 (former EIAJ CP-1201, CP-340),
AES3, EBU tech3250
Clock Recovery and Data Decode From
Biphase Input Signal, Generally Called S/PDIF,
EIAJ CP-1201, IEC60958, AES/EBU
Biphase Input Signal Sampling Frequency (f
S
)
Range: 28 kHz to 108 kHz
Low-Jitter Recovered System Clock: 50 ps
Jitter Tolerance Compliant With IEC60958-3
Selectable Recovered System Clock: 128 f
S
,
256 f
S
, 384 f
S
, 512 f
S
Serial Audio Data Output Formats: 24-Bit I
2
S;
MSB-First, 24-Bit Left-Justified; MSB-First 16-,
24-Bit Right-Justified
User Data, Channel-Status Data Outputs
Synchronized With Decoded Serial Audio Data
No External Clock Required for Decode
Includes Actual Sampling Frequency
Calculator (Needs External 24.576-MHz Clock)
Function Control: Parallel (Hardware)
Functions Similar and Pin Assignments
Equivalent to Those of DIR1703
Single Power Supply: 3.3 V (2.7 V to 3.6 V)
Wide Operating Temperature Range: –40°C to
85°C
5 V-Tolerant Digital Inputs
Package: 28-pin TSSOP, Pin Pitch: 0,65 mm |
DIR1703 96-kHz, 24-Bit Digital Audio Interface Receiver