IS64C5128AS
FEATURES
HIGH SPEED: (IS61/64C5128AL)
• High-speed access time: 10ns, 12 ns
• Low Active Power: 150 mW (typical)
• Low Standby Power: 10 mW (typical)
CMOS standby
LOW POWER: (IS61/64C5128AS)
• High-speed access time: 25ns
• Low Active Power: 75 mW (typical)
• Low Standby Power: 1 mW (typical)
CMOS standby
• TTL compatible interface levels
• Single 5V ± 10% power supply
• Fully static operation: no clock or refresh
required
• Available in 36-pin SOJ (400-mil), 32-pin
sTSOP-I, 32-pin SOP, 44-pin TSOP-II and 32-
pin TSOP-II packages
• Commercial, Industrial and Automotive temperature
ranges available
• Lead-free available
DESCRIPTION
The ISSI IS61C5128AL/AS and IS64C5128AL/AS are highspeed,
4,194,304-bit static RAMs organized as 524,288
words by 8 bits. They are fabricated using ISSI's highperformance
CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
access times as fast as 12 ns with low power consumption.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS61C5128AL/AS and IS64C5128AL/AS are packaged
in the JEDEC standard 36-pin SOJ (400-mil), 32-pin sTSOPI,
32-pin SOP, 44-pin TSOP-II and 32-pin TSOP-II packages
