IS42S83200B
FEATURES
• Clock frequency: 166, 143, 133 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Power supply
VDD VDDQ
IS42S83200B 3.3V 3.3V
IS42S16160B 3.3V 3.3V
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Auto Refresh (CBR)
• Self Refresh
• 8K refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Available in Industrial Temperature
• Available in 54-pin TSOP-II and 54-ball BGA
(x16 only)
• Available in Lead-free
OVERVIEW
ISSI's 256Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
The 256Mb SDRAM is organized as follows.
