IS24C256A
FEATURES
• Two-Wire Serial Interface, I2CTM compatible
–Bi-directional data transfer protocol
• Wide Voltage Operation
–Vcc = 1.8V to 5.5V
• 400 KHz (2.5V) and 1 MHz (5.0V) compatibility
• Low Power CMOS Technology
–Active Current less than 3 mA (2.5V)
–Standby Current less than 20 μA (2.5V)
• Hardware Data Protection
–Write Protect Pin
• Sequential Read Feature
• Filtered Inputs for Noise Suppression
• Self time write cycle with auto clear
–5 ms @ 2.5V
• Organization:
–16Kx8 (256 pages of 64 bytes)
–32Kx8 (512 pages of 64 bytes)
• 64 Byte Page Write Buffer
• High Reliability
–Endurance: 100,000 Cycles
–Data Retention: 40 Years
• Industrial and Automotive temperature ranges
• 8-pin PDIP, 8-pin (JEDEC) SOIC, and 8-pin
(EIAJ) SOIC packages
DESCRIPTION
The IS24C128A/256A is an electrically erasable PROM
device that uses the standard 2-wire interface for
communications. The IS24C128A is 128K-bit (16Kx8)
and the IS24C256A is 256K-bit (32Kx8). These
EEPROM are offered in a wide operating voltage range
of 1.8V to 5.5V to be compatible with most application
voltages. ISSI designed the IS24C128A/256A to be an
efficient 2-wire EEPROM solution. The devices are
packaged in 8-pin PDIP, 8-pin (JEDEC) SOIC, and 8-
pin (EIAJ) SOIC.
The IS24C128A/256A maintains compatibility with the
popular 2-wire bus protocol, so it is easy to design into
applications implementing this bus type. The simple
bus consists of the Serial Clock wire (SCL) and the
Serial Data wire (SDA). Using the bus, a Master device
such as a microcontroller is usually connected to one
or more Slave devices such as the IS24C128A/256A.
The bit stream over the SDA line includes a series of
bytes, which identifies a particular Slave device, an
instruction, an address within that Slave device, and a
series of data, if appropriate. The IS24C128A/256A has
a Write Protect pin (WP) to allow blocking of any write
instruction transmitted over the bus.
