features
1024 Bits of EEPROM Memory Partitioned Into
Four Pages of 256 Bits
♦ On-Chip 512-Bit SHA-1 Engine to Compute 160-
Bit Message Authentication Codes (MACs) and to
Generate Secrets
♦ Write Access Requires Knowledge of the Secret
and the Capability of Computing and Transmitting
a 160-Bit MAC as Authorization
♦ User-Programmable Page Write Protection for
Page 0, Page 3, or All Four Pages Together
♦ User-Programmable OTP EPROM Emulation Mode
for Page 1 (“Write to 0”)
♦ Communicates to Host with a Single Digital
Signal at 12.5kbps or 35.7kbps Using 1-Wire
Protocol
♦ Switchpoint Hysteresis and Filtering to Optimize
Communication Performance in the Presence of
Noise
♦ Reads and Writes Over 1.75V to 3.65V Voltage
Range from -20°C to +85°C
♦ 6-Lead TSOC and TDFN Packages
