• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The CY74FCT16823T and the CY74FCT162823T 18-bit bus interface registers are designed for use in high-speed, low-power systems needing wide registers and parity. 18-bit operation is achieved by connecting the control lines of the two 9-bit registers. Flow-through pinout and small shrink packaging aids in simplifying board layout.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CY74FCT16823T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

The CY74FCT162823T has 24-mA balanced output drivers with current limiting resistors in the outputs.

特性

• I_off supports partial-power-down mode operation
• Edge-rate control circuitry for significantly improved noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
• Industrial temperature range of -40°C to +85°C
• V_CC = 5V ± 10%
• CY74FCT16823T Features:
  • 64 mA sink current, 32 mA source current
  • Typical V_OLP (ground bounce) <1.0V at V_CC = 5V, T_A = 25°C
• CY74FCT162823T Features:
  • Balanced 24 mA output drivers
  • Reduced system switching noise
  • Typical V_OLP (ground bounce) <0.6V at V_CC = 5V, T_A = 25°C