• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The RCA-CD54/74AC564 and CD54/74AC574 and the CD54/74ACT564 and CD54/74ACT574 octal D-type, 3-state, positive-edge-triggered flip-flops use the RCA ADVANCED CMOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE\) controls the 3-state outputs and is independent of the register operation. When the Output Enable (OE\) is HIGH, the outpus are in the high-impendance state. The CD54/74AC/ACT564 and CD54/74AC/ACT574 share the same pin configurations; the CD54/74AC/ACT564, however, has inverted outputs and the CD54/74AC/ACT574 has non-inverted outputs.

The CD74AC/ACT564 and CD74AC/ACT574 are supplied in 20-lead dual-in-line plastic packages (E suffix) and in 20-lead dual-in-line small-outline plastic pakcages (M suffix).

特性

• Buffered inputs
• Typical propagation delay:
  6.5 ns @ V_CC = 5 V, T_A = 25°C, C_L = 50 pF
• Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
• SCR-Latchup-resistant CMOS process and circuit design
• Speed of bipolar FAST*/AS/S with significantly reduced power consumption
• Balanced propagation delays
• AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply
• ±24-mA output drive current
  -Fanout to 15 FAST* ICs
  -Drives 50-ohm transmission lines
• Characterized for operation from –40° to 85°C

*FAST is a Registered Trademark of Fairchild Semiconductor Corp.