• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The 'ACT16952 are 16-bit registered transceivers that contain two sets of D-type flip-flops for temporary storage of data flowing in either direction. They can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored in registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable ( or ) input is low. Taking the output-enable ( or ) input low accesses the data on either port. To avoid false clocking of the flip-flops, (or ) should not be switched from low to high while CLKAB (or CLKBA) is low.

The 74ACT16952 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

特性

• Members of the Texas Instruments Widebus^TM Family
• Inputs Are TTL-Voltage Compatible
• Noninverting Outputs
• Two 16-Bit, Back-to-Back Registers Store Data Flowing in Both Directions
• Flow-Through Architecture Optimizes PCB Layout
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated